1. Field of the Invention
The invention relates to a signal processing system, and more particularly, to a signal processing system capable of changing levels of input signals to generate output signals.
2. Description of the Prior Art
A digital-to-analog converter (DAC) is often used in a front-end of many signal processing mechanisms to convert digital signals into analog signals for following backend signal processing. Therefore, the DAC plays an important role in the audio field for the rapid developments of the audio/video media.
The audio signal is different from an ordinary transmitted signal. The highest frequency of the audio signal is approximately 20 KHz. Analyzing the audio signal is easier than analyzing a high-frequency signal. Therefore, a higher digitization accuracy is required for audio signals. In order to meet this requirement, a delta-sigma modulator is introduced.
A conventional delta-sigma modulator includes an integrator, a quantizer, and an adder. The integrator, coupled to the quantizer, receives and integrates an input signal x, and then transmits an integrated result to the quantizer. The quantizer quantizes the integrated result to generate a digital output signal Sout, which is further sent to the signal input end via a negative feedback path. After being processed by the adder, the digital output signal Sout is sent to the input end of the integrator. Since the structures and the functions of the integrator, the quantizer, and the adder are well known to one skilled in the art, further description is omitted for brevity. Please note that the transfer function of the delta-sigma modulator is shown as the following Equation:
                    y        =                              x                          f              +              1                                +                      fQ                          f              +              1                                                          Equation        ⁢                                  ⁢                  (          1          )                    In Equation (1), x represents the input signal and Q represents a quantization noise.
According to Equation (1), the integrator in the delta-sigma modulator is equivalent to a low-pass filter for the input signal and equivalent to a high-pass filter for the quantization noise when operating at low frequencies. Therefore, the output signal Sout is substantially equal to the input signal x at low frequencies and equal to the quantization noise at high frequencies. Moreover, an oversampling technique is used by the delta-sigma modulator. Assume that the input signal x is an audio signal with a low frequency, a sampling clock with a higher frequency is used for sampling the input signal x and then the above-mentioned quantization noise is distributed over more frequency components. The noise spectrum is thus changed and most of the quantization noise is shifted beyond the frequency band of signal measurement.
Referring the DAC, the input signal x is required to be amplified with a predetermined gain by a multiplier before the input signal x enters the delta-sigma modulator. The DAC includes an up-sampling circuit, a multiplier, a gain controller, and a delta-sigma modulator. The up-sampling circuit performs an oversampling operation to raise the sampling frequency and the gain controller assigns the predetermined gain to the multiplier such that the received signal of the multiplier is amplified accordingly. The multiplier is coupled to the following up-sampling circuit. Because the sampling frequency is lower before the up-sampling circuit performs the oversampling operation, the multiplier can be implemented by adders and shifters. However, if there are many input signals with different sampling frequencies to be amplified ahead of up-sampling, a plurality of multipliers is needed. If the signal amplifying is performed after the operation of the up-sampling circuit, although only one multiplier is needed, adders and shifters are not applicable because the signal amplifying no longer can be accomplished within one sampling cycle due to the raised sampling frequency of the up-sampled signal.